Design and Implementation of Voting Machine using FPGAs with Verilog HDL (Record no. 10632)

MARC details
000 -LEADER
fixed length control field 00402nam a22001097a 4500
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Vivek J. Bangera
9 (RLIN) 11293
245 ## - TITLE STATEMENT
Title Design and Implementation of Voting Machine using FPGAs with Verilog HDL
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Mumbai
Date of publication, distribution, etc. 2022
300 ## - PHYSICAL DESCRIPTION
Extent [50p.]
Other physical details Hardbound & Digital
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Callistus Pani George : Ritik S. Kumar : James R. Kundukulangara : Dr. Sudhakar S. Mande
9 (RLIN) 11294
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type
Holdings
Withdrawn status Lost status Damaged status Not for loan Collection Home library Current library Date acquired Total Checkouts Barcode Date last seen Price effective from Koha item type
          Don Bosco Institute of Technology Library Don Bosco Institute of Technology Library 07/05/2022   PR40 07/05/2022 07/05/2022