Routing Congestion in VLSI Circuits estimation and optimization

TextPublication details: New Delhi Springer 2007 Description: 248p. [F10]ISBN: 9788184893885DDC classification: 621.395

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Holdings
Item type	Current library	Collection	Call number	Status	Date due	Barcode
	Don Bosco Institute of Technology Library	Electronics	621.395 SAX/ROU (Browse shelf(Opens below))	Available		17262

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Previous	621.395 SAL/DIG Digital Cicuits And Design	621.395 SAR/OPE Operational Amplifiers and Their Applications	621.395 SAR/OPE Operational Amplifiers and Their Applications	621.395 SAX/ROU Routing Congestion in VLSI Circuits estimation and optimization	621.395 SIN/FUN Fundamentals of Digital Electronics and Microprocessors	621.395 SRI/STA Statistical Analysis and Optimization for VLSI timing and power	621.395 TAU/DIG Digital Circuits and Microprocessors	Next